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IA-64 Linux Kernel: Design and Implementation
ISBN-10: 0-13-061014-3
ISBN-13: 978-0-13-061014-0
Published by Prentice Hall
© 2002
Pub. Date: Jan 30, 2002
Format: Paper
Table of Contents
List of Figures.
List of Tables.
Foreword.
Preface.
1. Introduction.
Microprocessors: From CISC to EPIC. Overview of the Linux Kernel. Summary.
2. IA-64 Architecture.
User-Level Instruction Set Architecture. Runtime and Software Conventions. System Instruction Set Architecture. The Register Stack Engine (RSE). Summary.
3. Processes, Tasks, and Threads.
Introduction to Linux Tasks. The Thread Interface. Thread Synchronization. Summary.
4. Virtual Memory.
Introduction to the Virtual Memory System. Address Space of a Linux Process. Page Tables. Translation Lookaside Buffer (TLB). Page Fault Handling. Memory Coherency. Switching Address Spaces. Discussion and Summary.
5. Kernel Entry and Exit.
Interruptions. System Calls. Signals. Kernel Access to User Memory. Summary.
6. Stack Unwinding.
IA-64 ELF Unwind Sections. The Kernel Unwind Interface. Embedding Unwind Information in Assembly Code. Implementation Aspects. Summary.
7. DEVICE I/O.
Introduction. Programmed I/O. Direct Memory Access (DMA). Device Interrupts. Summary.
8. Symmetric Multiprocessing. @@AHEADS = Introduction to Multiprocessing on Linux. Linux Locking Principles. Multiprocessor Support Interface. CPU-Specific Data Area. Tracking Wall-Clock Time with High Resolution. Summary.
9. Understanding System Performance.
IA-64 Performance Monitoring Unit Overview. Extending the PMU: The Itanium Example. Kernel Support for Performance Monitoring. Summary.
10. Booting.
IA-64 Firmware Overview. The Bootloader. Kernel Initialization. Summary.
11. IA-32 Compatibility.
Architectural Support for IA-32. Linux Support for IA-32 Applications. Summary.
Appendix A. IA-64 CPU Models.
Appendix B. Kernel Register Usage.
Appendix C. IA-64 Instructions.
Integer Instructions. Memory Instructions. Semaphore Instructions. Branch Instructions. Control Instructions. Multimedia Instructions. Floating-Point Instructions. Privileged Instructions.
Appendix D: Itanium PMU Events.
Glossary.
Bibliography.
Index.
